? semiconductor components industries, llc, 2011 january, 2011 ? rev. 10 1 publication order number: mjd200/d mjd200 (npn) mjd210 (pnp) complementary plastic power transistors npn/pnp silicon dpak for surface mount applications designed for low voltage, low ? power, high ? gain audio amplifier applications. features ? collector ? emitter sustain ing v oltage ? v ceo(sus) = 25 vdc (min) @ i c = 10 madc ? high dc current gain ? h fe = 70 (min) @ i c = 500 madc = 45 (min) @ i c = 2 adc = 10 (min) @ i c = 5 adc ? lead formed for surface mount applications in plastic sleeves (no suffix) ? low collector ? emitter saturation voltage ? v ce(sat) = 0.3 vdc (max) @ i c = 500 madc = 0.75 vdc (max) @ i c = 2.0 adc ? high current ? gain ? bandwidth product ? f t = 65 mhz (min) @ i c = 100 madc ? annular construction for low leakage ? i cbo = 100 nadc @ rated v cb ? epoxy meets ul 94 v ? 0 @ 0.125 in ? esd ratings: human body model, 3b 8000 v machine model, c 400 v ? these are pb ? free packages maximum ratings rating symbol max unit collector ? base voltage v cb 40 vdc collector ? emitter voltage v ceo 25 vdc emitter ? base voltage v eb 8.0 vdc collector current ? continuous ? peak i c 5.0 10 adc base current i b 1.0 adc total power dissipation @ t c = 25 c derate above 25 c p d 12.5 0.1 w w/ c total power dissipation (note 1) @ t a = 25 c derate above 25 c p d 1.4 0.011 w w/ c operating and storage junction temperature range t j , t stg ? 65 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. these ratings are applicable when surface mounted on the minimum pad sizes recommended. silicon power transistors 5 amperes 25 volts, 12.5 watts dpak case 369c style 1 marking diagram a = assembly location y = year ww = work week x = 1 or 0 g=pb ? free package 1 2 3 4 ayww j2x0g see detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ordering information http://onsemi.com
mjd200 (npn) mjd210 (pnp) http://onsemi.com 2 thermal characteristics characteristic symbol max unit thermal resistance, junction ? to ? case r jc 10 c/w thermal resistance, junction ? to ? ambient (note 2) r ja 89.3 c/w 2. these ratings are applicable when surface mounted on the minimum pad sizes recommended. electrical characteristics (t c = 25 c unless otherwise noted) ??????????????????????? ??????????????????????? characteristic ???? ???? ??? ??? ???? ???? ??? ??? ????????????????????????????????? ????????????????????????????????? ??????????????????????? ??????????????????????? collector ? emitter sustaining voltage (note 3), (i c = 10 madc, i b = 0) ???? ???? ??? ??? ???? ???? ? ??? ??? vdc ??????????????????????? ??????????????????????? ??????????????????????? c) ???? ???? ???? ??? ??? ??? ? ? ???? ???? ???? 100 100 ??? ??? ??? adc ??????????????????????? ??????????????????????? ???? ???? ??? ??? ? ???? ???? 100 ??? ??? ????????????????????????????????? ????????????????????????????????? on characteristics ??????????????????????? ??????????????????????? ??????????????????????? dc current gain (note 3), (i c = 500 madc, v ce = 1 vdc) (i c = 2 adc, v ce = 1 vdc) (i c = 5 adc, v ce = 2 vdc) ???? ???? ???? ??? ??? ??? ???? ???? ???? ? 180 ? ??? ??? ??? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? collector ? emitter saturation voltage (note 3) (i c = 500 madc, i b = 50 madc) (i c = 2 adc, i b = 200 madc) (i c = 5 adc, i b = 1 adc) ???? ???? ???? ???? ??? ??? ??? ??? ? ? ? ???? ???? ???? ???? 0.3 0.75 1.8 ??? ??? ??? ??? ??????????????????????? ??????????????????????? ? emitter saturation voltage (note 3), (i c = 5 adc, i b = 1 adc) ???? ???? ??? ??? ? ???? ???? 2.5 ??? ??? ??????????????????????? ??????????????????????? ? emitter on voltage (note 3), (i c = 2 adc, v ce = 1 vdc) ???? ???? ??? ??? ? ???? ???? 1.6 ??? ??? ????????????????????????????????? ????????????????????????????????? dynamic characteristics ??????????????????????? ??????????????????????? ??????????????????????? current ? gain ? bandwidth product (note 4) (i c = 100 madc, v ce = 10 vdc, f test = 10 mhz) ???? ???? ???? ??? ??? ??? ???? ???? ???? ? ??? ??? ??? mhz ??????????????????????? ??????????????????????? ???? ???? ??? ??? ? ? ???? ???? 80 120 ??? ??? s, duty cycle 2%. 4. f t = ? h fe ?? f test . ordering information device package type shipping ? mjd200g dpak (pb ? free) 75 units / rail mjd200rlg dpak (pb ? free) 1800 / tape & reel mjd200t4g dpak (pb ? free) 2500 / tape & reel mjd210g dpak (pb ? free) 75 units / rail mjd210rlg dpak (pb ? free) 1800 / tape & reel mjd210t4 dpak 2500 / tape & reel mjd210t4g dpak (pb ? free) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
mjd200 (npn) mjd210 (pnp) http://onsemi.com 3 25 25 figure 1. power derating t, temperature ( c) 0 50 75 100 125 150 15 10 t c 5 20 p d , power dissipation (watts) figure 2. switching time test circuit 2.5 0 1.5 1 t a 0.5 2 +11 v 25 s 0 -9 v r b -4 v d 1 scope v cc +30 v r c t r , t f 10 ns duty cycle = 1% 51 d 1 must be fast recovery type, e.g.: 1n5825 used above i b 100 ma msd6100 used below i b 100 ma t c t a (surface mount) r b and r c varied to obtain desired current levels for pnp test circuit, reverse all polarities 10k i c , collector current (a) 10 5k 3k 2k 1k 500 300 200 100 50 1k i c , collector current (a) v cc = 30 v i c /i b = 10 t j = 25 c t, time (ns) 500 300 200 100 50 t d 30 20 10 5 1 0.01 0.03 0.05 0.5 0.2 0.02 0.1 0.3 10 figure 3. turn ? on time figure 4. turn ? off time t, time (ns) 3 2 5 2 13 t r mjd200 mjd210 30 20 0.01 0.03 0.05 0.5 0.2 0.02 0.1 0.3 10 5 2 13 v cc = 30 v i c /i b = 10 i b1 = i b2 t j = 25 c t s t f mjd200 mjd210
mjd200 (npn) mjd210 (pnp) http://onsemi.com 4 i c , collector current (a) i c , collector current (a) i c , collector current (a) h fe , dc current gain figure 5. dc current gain figure 6. ?on? voltage i c , collector current (a) 200 400 0.07 0.1 0.3 5 0.05 100 80 60 40 0.2 i c , collector current (a) figure 7. temperature coefficients 20 0.7 1 3 2 0.5 25 c t j = 150 c -55 c 2 0.05 i c , collector current (a) 5 1.6 1.2 0.8 0.4 0 3 2 0.07 0.2 0.1 0.5 0.3 1 0.7 t j = 25 c v, voltage (volts) npn mjd200 pnp mjd210 v ce = 1 v v ce = 2 v 5 0.05 3 200 400 100 80 60 40 20 h fe , dc current gain 25 c t j = 150 c -55 c v ce = 1 v v ce = 2 v v, voltage (volts) v be(sat) @ i c /i b = 10 v ce(sat) @ i c /i b = 10 v be @ v ce = 1 v vc for v ce(sat) vb for v be 2 0.05 1.6 1.2 0.8 0.4 0 3 2 0.07 0.2 0.1 0.5 0.3 1 0.7 t j = 25 c v be(sat) @ i c /i b = 10 v ce(sat) @ i c /i b = 10 v be @ v ce = 1 v v , temperature coefficients (mv/ c) +2.5 +2 +1.5 +1 0 -0.5 -1 -1.5 -2 +0.5 -2.5 0.07 0.1 0.3 5 0.05 0.2 0.7 1 3 2 0.5 *applies for i c /i b h fe/3 25 c to 150 c -55 c to 25 c 25 c to 150 c -55 c to 25 c v , temperature coefficients (mv/ c) +2.5 +2 +1.5 +1 0 -0.5 -1 -1.5 -2 +0.5 -2.5 0.07 0.1 0.3 5 0.05 0.2 0.7 1 3 2 0.5 5 0.07 0.1 0.3 0.2 0.7 1 2 0.5 *applies for i c /i b h fe/3 * vc for v ce(sat) vb for v be 25 c to 150 c -55 c to 25 c 25 c to 150 c -55 c to 25 c
mjd200 (npn) mjd210 (pnp) http://onsemi.com 5 t, time (ms) 0.01 0.02 0.05 1 2 5 10 20 50 100 200 0.1 0.5 0.2 1 0.2 0.1 0.05 r(t), transient thermal r jc (t) = r(t) jc r jc = 10 c/w max d curves apply for power pulse train shown read time at t 1 t j(pk) - t c = p (pk) jc (t) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 0.2 0 (single pulse) resistance (normalized) figure 8. thermal response 0.5 d = 0.5 0.05 0.3 0.7 0.07 0.03 0.02 0.1 0.02 0.01 10 v ce , collector ? emitter voltage (v) 0.01 30 2 5 0.1 bonding wire limited thermally limited @ t c = 25 c (single pulse) second breakdown limited curves apply below rated v ceo figure 9. active region safe operating area 500 s dc 1 3 1ms 20 10 7 5 3 2 1 0.3 100 s t j = 150 c i c , collector current (amp) 5ms there are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. safe operating area curves indicate i c ? v ce limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. the data of figure 9 is based on t j(pk) = 150 c; t c is variable depending on conditions. second breakdown pulse limits are valid for duty cycles to 10% provided t j(pk) 150 c. t j(pk) may be calculated from the data in figure 8. at high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. 200 v r , reverse voltage (v) 20 40 70 100 30 figure 10. capacitance 50 20 10 6 4 2 1 0.4 c, capacitance (pf) 0.6 t j = 25 c mjd200 (npn) mjd210 (pnp) c ob c ib
mjd200 (npn) mjd210 (pnp) http://onsemi.com 6 package dimensions dpak case 369c ? 01 issue d style 1: pin 1. base 2. collector 3. emitter 4. collector 5.80 0.228 2.58 0.101 1.6 0.063 6.20 0.244 3.0 0.118 6.172 0.243 mm inches scale 3:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* b d e b3 l3 l4 b2 e m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 12 3 4 h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.108 ref 2.74 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. mjd200/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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